Intel is positioning its Embedded Multi-die Interconnect Bridge-T, or EMIB-T, as a potential alternative to Taiwan Semiconductor Manufacturing Co.’s CoWoS, the dominant advanced packaging technology used for artificial-intelligence chips, as demand for larger and more complex AI processors strains existing capacity.
CoWoS has become the industry standard for high-performance AI accelerators, but Bernstein analysts said Intel’s EMIB-T could narrow the gap, particularly for customers seeking very large package sizes and U.S.-based manufacturing.
Go deeper with analyst-driven data: fair value estimates, revision trends, and performance screens on InvestingPro - take up to 50% off your upgrade Intel has offered EMIB-T to external customers after years of using EMIB internally, with Bernstein reporting that Google-MediaTek is considering the technology for a 2027 tensor processing unit and Meta is evaluating it for its MTIA accelerators.
EMIB-T builds on Intel’s earlier EMIB approach by embedding silicon bridges and through-silicon vias into the substrate. Bernstein said this allows EMIB-T to support larger reticle scaling than current CoWoS offerings.
CoWoS-S supports about 3.3x reticle size, with CoWoS-L expected to extend to 5.5x and later 9.5x in 2027. Intel has said EMIB supported 6x reticle size in 2024 and is targeting 8x in 2026 and as much as 12× by 2028.
Bernstein attributed this difference to production geometry. CoWoS relies on round wafers as carriers, leaving unused space at the edges as package sizes increase.
EMIB-T uses rectangular substrates, which reduces wasted area for large packages and lowers overall material usage. Bernstein estimated that EMIB packaging costs “a few hundred $” per chip, compared with $900 to $1,000 for CoWoS on a Rubin-equivalent AI processor.
Still, Bernstein said EMIB-T’s lack of an external production track record remains a key risk. Embedding silicon bridges inside organic substrates introduces yield challenges due to material mismatch and mechanical stress.
Failed packages can result in the loss of expensive logic dies and high-bandwidth memory stacks, requiring consistently high yields to remain cost competitive with CoWoS.
Intel’s U.S. packaging footprint is another differentiator. The company operates advanced packaging facilities in New Mexico and Malaysia and has established processes at Amkor’s Songdo facility in South Korea, with additional capacity planned in Arizona.
Bernstein said this gives Intel an advantage for customers seeking near-term U.S.-based packaging, as TSMC’s U.S. packaging plans have not yet disclosed firm timelines.
The potential financial impact varies by company. Bernstein estimated that if 1 million AI processors shifted from CoWoS to EMIB-T, TSMC could see a revenue impact of about $1 billion, or roughly 0.5% of its projected 2027 revenue.
Intel, by contrast, could see high-hundreds-of-millions of dollars in additional revenue, equal to about 1% to 2% of total sales.
On an earnings call, Intel management said advanced packaging opportunities could range from “hundreds of millions of dollars” to “north of a billion dollars” per customer, Bernstein reported.
Bernstein said the largest relative winner could be substrate supplier Ibiden, as EMIB-T shifts more complexity and value to substrates.
The brokerage estimated EMIB-T substrate content could reach about $300 per chip, compared with $180 to $200 for Rubin and $80 to $100 for earlier designs, translating into meaningful revenue and operating profit upside if adoption expands.
